Quarter-square multipliers have been implemented (analog computation) with piece-wise linear approximation using diodes and resistors. This technique suffers from parasitic capacitive reactance at 50 megahertz or higher frequencies, and is a fairly high voltage, high impedence technique (plus or minus 10 volts, 1K ohm), which is not well suited to microwave use. Similarly, the integrated circuit multiplier is not well suited for microwave use. Most double grid tubes, double base transistors, and double gate field effect transistors can be biased for product detection. However, the dynamic range available is small. One difficulty lies in obtaining satisfactory response down to d.c. (CW carrier). Other difficulties include the limit in carrier frequency to several hundred megahertz, and the supply of power and bias voltage, all of which make this a less desirable approach to providing a microwave quarter-square multiplier. Transconductance multipliers and linear piece-wise approximation devices are limited by interelectrode reactances to frequencies below 100 megahertz.